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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-22 21:30:34 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-22 21:30:34 +0000 |
commit | bef34e21c7c199a5c4cf1a95a9e4ee9a405b26f3 (patch) | |
tree | 5b2cbbf5482af829d8e274555afb4bc117546034 /llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | |
parent | 94be2dee7ec126ed833599c7c7b88f045b02dcd1 (diff) | |
download | bcm5719-llvm-bef34e21c7c199a5c4cf1a95a9e4ee9a405b26f3.tar.gz bcm5719-llvm-bef34e21c7c199a5c4cf1a95a9e4ee9a405b26f3.zip |
AMDGPU: Rename intrinsics to use amdgcn prefix
The intrinsic target prefix should match the target name
as it appears in the triple.
This is not yet complete, but gets most of the important ones.
llvm.AMDGPU.* intrinsics used by mesa and libclc are still handled
for compatability for now.
llvm-svn: 258557
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600ISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index d6b6e197657..6c052b810b3 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -781,7 +781,8 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const case Intrinsic::r600_read_local_size_z: return LowerImplicitParameter(DAG, VT, DL, 8); - case Intrinsic::AMDGPU_read_workdim: { + case Intrinsic::r600_read_workdim: + case AMDGPUIntrinsic::AMDGPU_read_workdim: { // Legacy name. uint32_t ByteOffset = getImplicitParameterOffset(MFI, GRID_DIM); return LowerImplicitParameter(DAG, VT, DL, ByteOffset / 4); } @@ -804,7 +805,12 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const case Intrinsic::r600_read_tidig_z: return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, AMDGPU::T0_Z, VT); - case Intrinsic::AMDGPU_rsq: + + // FIXME: Should be renamed to r600 prefix + case Intrinsic::AMDGPU_rsq_clamped: + return DAG.getNode(AMDGPUISD::RSQ_CLAMPED, DL, VT, Op.getOperand(1)); + + case Intrinsic::r600_rsq: // XXX - I'm assuming SI's RSQ_LEGACY matches R600's behavior. return DAG.getNode(AMDGPUISD::RSQ_LEGACY, DL, VT, Op.getOperand(1)); } |