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| author | Artem Tamazov <artem.tamazov@amd.com> | 2016-05-26 15:52:16 +0000 |
|---|---|---|
| committer | Artem Tamazov <artem.tamazov@amd.com> | 2016-05-26 15:52:16 +0000 |
| commit | b49c3361e532edcf1ab3fb07c29be09d31a57336 (patch) | |
| tree | 4916f7affbc1619eb719bcebb437053c85c7aa8b /llvm/lib/Target/AMDGPU/Disassembler | |
| parent | cf340bd9c1729f44daa31d58ec39aa1af97798b4 (diff) | |
| download | bcm5719-llvm-b49c3361e532edcf1ab3fb07c29be09d31a57336.tar.gz bcm5719-llvm-b49c3361e532edcf1ab3fb07c29be09d31a57336.zip | |
Fix build warning introduced in r270552 "[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers."
llvm-svn: 270859
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index f1ee4124faa..a76c0de33e8 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -359,7 +359,8 @@ MCOperand AMDGPUDisassembler::decodeSrcOp(const OpWidthTy Width, unsigned Val) c if (VGPR_MIN <= Val && Val <= VGPR_MAX) { return createRegOperand(getVgprClassId(Width), Val - VGPR_MIN); } - if (SGPR_MIN <= Val && Val <= SGPR_MAX) { + if (Val <= SGPR_MAX) { + assert(SGPR_MIN == 0); // "SGPR_MIN <= Val" is always true and causes compilation warning. return createSRegOperand(getSgprClassId(Width), Val - SGPR_MIN); } if (TTMP_MIN <= Val && Val <= TTMP_MAX) { |
