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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-05-26 15:40:36 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-05-26 15:40:36 +0000 |
| commit | cf340bd9c1729f44daa31d58ec39aa1af97798b4 (patch) | |
| tree | 7868d288471ceced3d96209464244197641c1f27 /llvm/lib/Target/AMDGPU/Disassembler | |
| parent | de37cfb5964e7e18334ed77107b39a57c17a5696 (diff) | |
| download | bcm5719-llvm-cf340bd9c1729f44daa31d58ec39aa1af97798b4.tar.gz bcm5719-llvm-cf340bd9c1729f44daa31d58ec39aa1af97798b4.zip | |
[X86][SSE] When lowering a 256-bit shuffle as PMOVZX, reduce the input vector to the lower 128-bit subvector.
Most often as not this is what it started out as, the extraction is zero-cost on AVX and the PMOVZX/PMOVSX folding logic is based around 128-bit loads.
llvm-svn: 270858
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler')
0 files changed, 0 insertions, 0 deletions
