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authorMatt Arsenault <Matthew.Arsenault@amd.com>2020-01-07 12:38:35 -0500
committerMatt Arsenault <arsenm2@gmail.com>2020-01-09 10:29:32 -0500
commite71af775684a83f0d1d05ab5225d36830d5aa87e (patch)
tree92be526ab7ae8ff9c936bb20f27563dd029c40b8 /llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
parent79450a4ea26a0e9731eaf2629f6dd8c1ffd8f407 (diff)
downloadbcm5719-llvm-e71af775684a83f0d1d05ab5225d36830d5aa87e.tar.gz
bcm5719-llvm-e71af775684a83f0d1d05ab5225d36830d5aa87e.zip
AMDGPU/GlobalISel: Add IMMPopCount xform
Partially fixes BFE pattern import.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index c0830ac2a0b..095c667e143 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -2128,6 +2128,12 @@ void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB,
}
}
+void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,
+ const MachineInstr &MI) const {
+ assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && "Expected G_CONSTANT");
+ MIB.addImm(MI.getOperand(1).getCImm()->getValue().countPopulation());
+}
+
bool AMDGPUInstructionSelector::isInlineImmediate16(int64_t Imm) const {
return AMDGPU::isInlinableLiteral16(Imm, STI.hasInv2PiInlineImm());
}
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