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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-02-13 01:03:00 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-02-13 01:03:00 +0000 |
| commit | 79963e80b8d0fb8ba059ac2862cca8c614af821b (patch) | |
| tree | 8b5dbd7d9cadf0d67004828f24f8eb8184a3e5d7 /llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | |
| parent | 9d307494467381e0481240ddb59f8167d9991cb0 (diff) | |
| download | bcm5719-llvm-79963e80b8d0fb8ba059ac2862cca8c614af821b.tar.gz bcm5719-llvm-79963e80b8d0fb8ba059ac2862cca8c614af821b.zip | |
AMDGPU: Rename intrinsic to better match instruction name
Also fixes missing f32 test.
llvm-svn: 260780
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td index 5e6d3102027..19932419ebe 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td @@ -63,7 +63,7 @@ def AMDGPUrsq : SDNode<"AMDGPUISD::RSQ", SDTFPUnaryOp>; def AMDGPUrsq_legacy : SDNode<"AMDGPUISD::RSQ_LEGACY", SDTFPUnaryOp>; // out = 1.0 / sqrt(a) result clamped to +/- max_float. -def AMDGPUrsq_clamped : SDNode<"AMDGPUISD::RSQ_CLAMPED", SDTFPUnaryOp>; +def AMDGPUrsq_clamp : SDNode<"AMDGPUISD::RSQ_CLAMP", SDTFPUnaryOp>; def AMDGPUldexp : SDNode<"AMDGPUISD::LDEXP", AMDGPULdExpOp>; |
