diff options
author | Marek Olsak <marek.olsak@amd.com> | 2016-01-13 17:23:04 +0000 |
---|---|---|
committer | Marek Olsak <marek.olsak@amd.com> | 2016-01-13 17:23:04 +0000 |
commit | 8a0f335ad667796d9a581c09ae6d06d030176b14 (patch) | |
tree | 313cfa4dee5227e372696e20ee53f10d2422427a /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | |
parent | 9c3bf3187a0b66ffbdf81f3d5e315cf14609b296 (diff) | |
download | bcm5719-llvm-8a0f335ad667796d9a581c09ae6d06d030176b14.tar.gz bcm5719-llvm-8a0f335ad667796d9a581c09ae6d06d030176b14.zip |
AMDGPU/SI: Add support for non-void functions
Summary:
Return values can be stored in SGPRs (i32) and VGPRs (f32).
This will be used by functions which expect some bytecode or other binary to
be appended at the end. It allows defining in which registers the return
values will be stored.
v2: don't do this for compute shaders
Reviewers: tstellarAMD, arsenm
Subscribers: arsenm
Differential Revision: http://reviews.llvm.org/D16033
llvm-svn: 257621
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h index 65e4a0a7186..37925416a9c 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h @@ -115,6 +115,8 @@ protected: SmallVectorImpl<ISD::InputArg> &OrigIns) const; void AnalyzeFormalArguments(CCState &State, const SmallVectorImpl<ISD::InputArg> &Ins) const; + void AnalyzeReturn(CCState &State, + const SmallVectorImpl<ISD::OutputArg> &Outs) const; public: AMDGPUTargetLowering(TargetMachine &TM, const AMDGPUSubtarget &STI); |