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author | Nirav Dave <niravd@google.com> | 2016-12-14 16:43:44 +0000 |
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committer | Nirav Dave <niravd@google.com> | 2016-12-14 16:43:44 +0000 |
commit | f5bf03c7ef61c7e6f44ce22a5144b5e13be6e797 (patch) | |
tree | 8bbad8c76c9b57a0cdd5914eac2c7d7e06d69de1 /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
parent | a37860acee2d02520e32d20dffd80fe43859b419 (diff) | |
download | bcm5719-llvm-f5bf03c7ef61c7e6f44ce22a5144b5e13be6e797.tar.gz bcm5719-llvm-f5bf03c7ef61c7e6f44ce22a5144b5e13be6e797.zip |
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
Reverting due to ARM MCJIT and MIPS LLD error.
This reverts commit r289659.
llvm-svn: 289667
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 24ecd9e7659..baf27971dd7 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -453,6 +453,16 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM, PredictableSelectIsExpensive = false; + // We want to find all load dependencies for long chains of stores to enable + // merging into very wide vectors. The problem is with vectors with > 4 + // elements. MergeConsecutiveStores will attempt to merge these because x8/x16 + // vectors are a legal type, even though we have to split the loads + // usually. When we can more precisely specify load legality per address + // space, we should be able to make FindBetterChain/MergeConsecutiveStores + // smarter so that they can figure out what to do in 2 iterations without all + // N > 4 stores on the same chain. + GatherAllAliasesMaxDepth = 16; + // FIXME: Need to really handle these. MaxStoresPerMemcpy = 4096; MaxStoresPerMemmove = 4096; |