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| author | Geoff Berry <gberry@codeaurora.org> | 2017-07-18 16:14:22 +0000 |
|---|---|---|
| committer | Geoff Berry <gberry@codeaurora.org> | 2017-07-18 16:14:22 +0000 |
| commit | 9962faed2b3019dd97676127f2e71a2cc3d7c26e (patch) | |
| tree | a04d8717df8b09b8c1f357ea5a75b27f932e7b85 /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
| parent | 964a1f1fb0f4c52ddf0d7bf7c7c9858543e80556 (diff) | |
| download | bcm5719-llvm-9962faed2b3019dd97676127f2e71a2cc3d7c26e.tar.gz bcm5719-llvm-9962faed2b3019dd97676127f2e71a2cc3d7c26e.zip | |
[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 2)
Summary:
Avoid HW prefetcher instruction tag collisions in loops by inserting
MOVs to change the base address register of strided loads.
Reviewers: t.p.northover, mcrosier
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls, hfinkel, llvm-commits
Differential Revision: https://reviews.llvm.org/D35366
llvm-svn: 308324
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions
