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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 03:05:30 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 03:05:30 +0000 |
| commit | 4e55c1ec116de59ea1a0225974d616ac9236c43f (patch) | |
| tree | 34f4c99a7c9c2e1a869e7a670016268b7c09c00d /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
| parent | 704f814a5e5f9bb65749a56ddb66eb9be22c0736 (diff) | |
| download | bcm5719-llvm-4e55c1ec116de59ea1a0225974d616ac9236c43f.tar.gz bcm5719-llvm-4e55c1ec116de59ea1a0225974d616ac9236c43f.zip | |
AMDGPU: Update isFPImmLegal for f16
I don't think this matters because ConstantFP is legal.
llvm-svn: 290299
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 7884c4c7b19..cd0d60fc6ac 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -498,7 +498,8 @@ bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const { // FIXME: Why are we reporting vectors of FP immediates as legal? bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { EVT ScalarVT = VT.getScalarType(); - return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64); + return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64 || + (ScalarVT == MVT::f16 && Subtarget->has16BitInsts())); } // We don't want to shrink f64 / f32 constants. |
