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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-11-01 23:22:17 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-11-01 23:22:17 +0000 |
commit | c507cdb4bca79c6a82061c114c1d0d6e6eee73a1 (patch) | |
tree | 33c54c998dd010085ed3479694698654d31b1ced /llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | |
parent | 0f1767ddce60cbe3c63cb52c9e7ec820972b2dfe (diff) | |
download | bcm5719-llvm-c507cdb4bca79c6a82061c114c1d0d6e6eee73a1.tar.gz bcm5719-llvm-c507cdb4bca79c6a82061c114c1d0d6e6eee73a1.zip |
AMDGPU: Handle CopyToReg in getOperandRegClass
llvm-svn: 285768
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp index b035c871fad..2b3b3fd28b4 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp @@ -183,8 +183,21 @@ bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N) const { /// determined. const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N, unsigned OpNo) const { - if (!N->isMachineOpcode()) + if (!N->isMachineOpcode()) { + if (N->getOpcode() == ISD::CopyToReg) { + unsigned Reg = cast<RegisterSDNode>(N->getOperand(1))->getReg(); + if (TargetRegisterInfo::isVirtualRegister(Reg)) { + MachineRegisterInfo &MRI = CurDAG->getMachineFunction().getRegInfo(); + return MRI.getRegClass(Reg); + } + + const SIRegisterInfo *TRI + = static_cast<const SISubtarget *>(Subtarget)->getRegisterInfo(); + return TRI->getPhysRegClass(Reg); + } + return nullptr; + } switch (N->getMachineOpcode()) { default: { |