diff options
author | Jessica Paquette <jpaquette@apple.com> | 2019-07-23 21:39:50 +0000 |
---|---|---|
committer | Jessica Paquette <jpaquette@apple.com> | 2019-07-23 21:39:50 +0000 |
commit | a2fae1e3e99119d2701c855b71991c80648376fa (patch) | |
tree | 4d86ce473418e7a51f1b0afa6b1ae9f643ec714e /llvm/lib/Target/AArch64 | |
parent | b362c976fb7d25f3eb4a5297abbad5489ea8deef (diff) | |
download | bcm5719-llvm-a2fae1e3e99119d2701c855b71991c80648376fa.tar.gz bcm5719-llvm-a2fae1e3e99119d2701c855b71991c80648376fa.zip |
[GlobalISel][AArch64] Save a copy on G_SELECT by fixing condition to GPR
The condition can never be fed by FPRs, so it should always be on a GPR.
Differential Revision: https://reviews.llvm.org/D65157
llvm-svn: 366854
Diffstat (limited to 'llvm/lib/Target/AArch64')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp index b52259cc9ac..168b69e4981 100644 --- a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp @@ -702,11 +702,10 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { break; // If we're taking in vectors, we have no choice but to put everything on - // FPRs. + // FPRs, except for the condition. The condition must always be on a GPR. LLT SrcTy = MRI.getType(MI.getOperand(2).getReg()); if (SrcTy.isVector()) { - for (unsigned Idx = 0; Idx < 4; ++Idx) - OpRegBankIdx[Idx] = PMI_FirstFPR; + OpRegBankIdx = {PMI_FirstFPR, PMI_FirstGPR, PMI_FirstFPR, PMI_FirstFPR}; break; } @@ -750,8 +749,7 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { // If we have more FP constraints than not, then move everything over to // FPR. if (NumFP >= 2) - for (unsigned Idx = 0; Idx < 4; ++Idx) - OpRegBankIdx[Idx] = PMI_FirstFPR; + OpRegBankIdx = {PMI_FirstFPR, PMI_FirstGPR, PMI_FirstFPR, PMI_FirstFPR}; break; } |