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authorChad Rosier <mcrosier@codeaurora.org>2014-04-09 20:43:40 +0000
committerChad Rosier <mcrosier@codeaurora.org>2014-04-09 20:43:40 +0000
commit9ce19fb65cd8f4953ec983b626577ef573b0d49a (patch)
tree2297ab1eb5a11085804ed0c4aaf5f8d7609b46bb /llvm/lib/Target/AArch64
parent2a24e3ad86224459449ee1006f9ef8c1062558ee (diff)
downloadbcm5719-llvm-9ce19fb65cd8f4953ec983b626577ef573b0d49a.tar.gz
bcm5719-llvm-9ce19fb65cd8f4953ec983b626577ef573b0d49a.zip
[AArch64] Implement the isTruncateFree API.
In AArch64 i64 to i32 truncate operation is a subregister access. This allows more opportunities for LSR optmization to eliminate variables of different types (i32 and i64). llvm-svn: 205925
Diffstat (limited to 'llvm/lib/Target/AArch64')
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.cpp21
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.h4
2 files changed, 25 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 2edb19281de..7accadc6a0f 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -5368,3 +5368,24 @@ bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
return false;
}
+
+// Truncations from 64-bit GPR to 32-bit GPR is free.
+bool AArch64TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
+ if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
+ return false;
+ unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
+ unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
+ if (NumBits1 <= NumBits2)
+ return false;
+ return true;
+}
+
+bool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
+ if (!VT1.isInteger() || !VT2.isInteger())
+ return false;
+ unsigned NumBits1 = VT1.getSizeInBits();
+ unsigned NumBits2 = VT2.getSizeInBits();
+ if (NumBits1 <= NumBits2)
+ return false;
+ return true;
+}
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index e946b250e3f..6a4b0c791fe 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -277,6 +277,10 @@ public:
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
bool isLegalICmpImmediate(int64_t Val) const;
+
+ bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
+ bool isTruncateFree(EVT VT1, EVT VT2) const override;
+
SDValue getSelectableIntSetCC(SDValue LHS, SDValue RHS, ISD::CondCode CC,
SDValue &A64cc, SelectionDAG &DAG, SDLoc &dl) const;
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