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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-12-14 22:34:10 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-12-14 22:34:10 +0000 |
| commit | 7d7adf4f2e4e50f738a5f692e6f011dcfca6b070 (patch) | |
| tree | df846d9653c67e5bcd684da57d8dc97665c057b3 /llvm/lib/Target/AArch64 | |
| parent | c7bc461298d540cefec9ffe370f68dfbca367e8b (diff) | |
| download | bcm5719-llvm-7d7adf4f2e4e50f738a5f692e6f011dcfca6b070.tar.gz bcm5719-llvm-7d7adf4f2e4e50f738a5f692e6f011dcfca6b070.zip | |
TLI: Allow using PSV for intrinsic mem operands
llvm-svn: 320756
Diffstat (limited to 'llvm/lib/Target/AArch64')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index e1dc6307f24..aaf2811563d 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -7371,6 +7371,7 @@ SDValue AArch64TargetLowering::LowerVECREDUCE(SDValue Op, /// specified in the intrinsic calls. bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, + MachineFunction &MF, unsigned Intrinsic) const { auto &DL = I.getModule()->getDataLayout(); switch (Intrinsic) { diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h index 2af40edd862..f88c0ac6653 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h @@ -306,6 +306,7 @@ public: MachineBasicBlock *MBB) const override; bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, + MachineFunction &MF, unsigned Intrinsic) const override; bool isTruncateFree(Type *Ty1, Type *Ty2) const override; |
