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| author | Tim Northover <tnorthover@apple.com> | 2016-07-20 19:09:30 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-07-20 19:09:30 +0000 |
| commit | 62ae568bbb9c4d22d341a71d12ab0bc74506476c (patch) | |
| tree | 3f97084359b5198bb5223ea2c93d9b01cc608be0 /llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h | |
| parent | 228d27c70f4ba3f32f07719c9a299fd7d7db2d5b (diff) | |
| download | bcm5719-llvm-62ae568bbb9c4d22d341a71d12ab0bc74506476c.tar.gz bcm5719-llvm-62ae568bbb9c4d22d341a71d12ab0bc74506476c.zip | |
GlobalISel: implement low-level type with just size & vector lanes.
This should be all the low-level instruction selection needs to determine how
to implement an operation, with the remaining context taken from the opcode
(e.g. G_ADD vs G_FADD) or other flags not based on type (e.g. fast-math).
llvm-svn: 276158
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h index 907bcfdea16..a051a969dac 100644 --- a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h +++ b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h @@ -64,6 +64,8 @@ public: /// Alternative in the sense different from getInstrMapping. InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const override; + + InstructionMapping getInstrMapping(const MachineInstr &MI) const override; }; } // End llvm namespace. #endif |
