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author | Jun Bum Lim <junbuml@codeaurora.org> | 2016-02-11 16:18:24 +0000 |
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committer | Jun Bum Lim <junbuml@codeaurora.org> | 2016-02-11 16:18:24 +0000 |
commit | 633b2d81ebb9c3b919f5d35e8d8bd21ff38d58d9 (patch) | |
tree | b2a5f6c67359870af0d663b3b8b49ea5e3e1c059 /llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | |
parent | 3086c04a93fc768b3c3931ae8b6266b51599deea (diff) | |
download | bcm5719-llvm-633b2d81ebb9c3b919f5d35e8d8bd21ff38d58d9.tar.gz bcm5719-llvm-633b2d81ebb9c3b919f5d35e8d8bd21ff38d58d9.zip |
[AArch64] Refactoring findMatchingStore() in aarch64-ldst-opt; NFC
Summary: This change makes findMatchingStore() follow the same coding style introduced in r260275.
Reviewers: gberry, junbuml
Subscribers: aemerson, rengolin, haicheng, bmakam, mssimpso
Differential Revision: http://reviews.llvm.org/D17083
llvm-svn: 260534
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp index fb65048c1d3..d2555148ff0 100644 --- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp +++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp @@ -1106,27 +1106,29 @@ static bool mayAlias(MachineInstr *MIa, bool AArch64LoadStoreOpt::findMatchingStore( MachineBasicBlock::iterator I, unsigned Limit, MachineBasicBlock::iterator &StoreI) { - MachineBasicBlock::iterator E = I->getParent()->begin(); + MachineBasicBlock::iterator B = I->getParent()->begin(); MachineBasicBlock::iterator MBBI = I; MachineInstr *LoadMI = I; unsigned BaseReg = getLdStBaseOp(LoadMI).getReg(); + // If the load is the first instruction in the block, there's obviously + // not any matching store. + if (MBBI == B) + return false; + // Track which registers have been modified and used between the first insn // and the second insn. ModifiedRegs.reset(); UsedRegs.reset(); - // FIXME: We miss the case where the matching store is the first instruction - // in the basic block. - for (unsigned Count = 0; MBBI != E && Count < Limit;) { + unsigned Count = 0; + do { --MBBI; MachineInstr *MI = MBBI; - // Skip DBG_VALUE instructions. Otherwise debug info can affect the - // optimization by changing how far we scan. - if (MI->isDebugValue()) - continue; - // Now that we know this is a real instruction, count it. - ++Count; + + // Don't count DBG_VALUE instructions towards the search limit. + if (!MI->isDebugValue()) + ++Count; // If the load instruction reads directly from the address to which the // store instruction writes and the stored value is not modified, we can @@ -1154,7 +1156,7 @@ bool AArch64LoadStoreOpt::findMatchingStore( // If we encounter a store aliased with the load, return early. if (MI->mayStore() && mayAlias(LoadMI, MI, TII)) return false; - } + } while (MBBI != B && Count < Limit); return false; } |