summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-08-29 17:24:32 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-08-29 17:24:32 +0000
commitcaff0a88dd21e045712d843a3d3c90ea12944e96 (patch)
tree78668ba0554ded4b94f75521e50ec670b92a110f /llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
parente1327e696e19e54cde4e85216edae26141e7fd0e (diff)
downloadbcm5719-llvm-caff0a88dd21e045712d843a3d3c90ea12944e96.tar.gz
bcm5719-llvm-caff0a88dd21e045712d843a3d3c90ea12944e96.zip
GlobalISel: Add known bits to InstructionSelector
AMDGPU uses this for some addressing mode selection patterns. The analysis run itself doesn't do anything so it seems easier to just always require this than adding a way to opt in. llvm-svn: 370388
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index dda8f1c0968..1865e577b21 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -54,8 +54,9 @@ public:
bool select(MachineInstr &I) override;
static const char *getName() { return DEBUG_TYPE; }
- void setupMF(MachineFunction &MF, CodeGenCoverage &CoverageInfo) override {
- InstructionSelector::setupMF(MF, CoverageInfo);
+ void setupMF(MachineFunction &MF, GISelKnownBits &KB,
+ CodeGenCoverage &CoverageInfo) override {
+ InstructionSelector::setupMF(MF, KB, CoverageInfo);
// hasFnAttribute() is expensive to call on every BRCOND selection, so
// cache it here for each run of the selector.
OpenPOWER on IntegriCloud