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authorTim Northover <tnorthover@apple.com>2016-09-01 20:45:41 +0000
committerTim Northover <tnorthover@apple.com>2016-09-01 20:45:41 +0000
commit8d8812c5d7e546b40e0549fd3d82f74c7f6d4ba5 (patch)
tree1dc7afdc4727c92305b1d874892b96e545d684e5 /llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
parentbc555b7ebe054eb5fde6548b299a622fad66de34 (diff)
downloadbcm5719-llvm-8d8812c5d7e546b40e0549fd3d82f74c7f6d4ba5.tar.gz
bcm5719-llvm-8d8812c5d7e546b40e0549fd3d82f74c7f6d4ba5.zip
GlobalISel: add a G_PHI instruction to give phis a type.
They're another source of generic vregs, which are going to need a type on the definition when we remove the register width from MachineRegisterInfo. llvm-svn: 280412
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 779b624b0f7..26342a19546 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -235,6 +235,12 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const {
return true;
}
+ case TargetOpcode::G_PHI: {
+ I.setDesc(TII.get(TargetOpcode::PHI));
+ I.removeTypes();
+ return true;
+ }
+
case TargetOpcode::G_FRAME_INDEX: {
// allocas and G_FRAME_INDEX are only supported in addrspace(0).
if (I.getType() != LLT::pointer(0)) {
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