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author | Tim Northover <tnorthover@apple.com> | 2017-01-17 22:43:34 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2017-01-17 22:43:34 +0000 |
commit | 509091f9e0f5a3526263a0875cb773a3f535d908 (patch) | |
tree | 721209db2459d0b40cf3c22ee2218c98ac213746 /llvm/lib/Target/AArch64/AArch64CallLowering.cpp | |
parent | d9433542161b6adb2dbb56f33e974db1d69643cc (diff) | |
download | bcm5719-llvm-509091f9e0f5a3526263a0875cb773a3f535d908.tar.gz bcm5719-llvm-509091f9e0f5a3526263a0875cb773a3f535d908.zip |
GlobalISel: add callseq instructions to record stack usage
llvm-svn: 292284
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64CallLowering.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp index 7efee8bf8c2..4f5b2886b1a 100644 --- a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp @@ -97,7 +97,7 @@ struct OutgoingArgHandler : public CallLowering::ValueHandler { MachineInstrBuilder MIB, CCAssignFn *AssignFn, CCAssignFn *AssignFnVarArg) : ValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB), - AssignFnVarArg(AssignFnVarArg) {} + AssignFnVarArg(AssignFnVarArg), StackSize(0) {} unsigned getStackAddress(uint64_t Size, int64_t Offset, MachinePointerInfo &MPO) override { @@ -113,6 +113,7 @@ struct OutgoingArgHandler : public CallLowering::ValueHandler { MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); + StackSize = std::max(StackSize, Size + Offset); return AddrReg; } @@ -141,6 +142,7 @@ struct OutgoingArgHandler : public CallLowering::ValueHandler { MachineInstrBuilder MIB; CCAssignFn *AssignFnVarArg; + uint64_t StackSize; }; void AArch64CallLowering::splitToValueTypes( @@ -275,6 +277,8 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, CCAssignFn *AssignFnVarArg = TLI.CCAssignFnForCall(F.getCallingConv(), /*IsVarArg=*/true); + auto CallSeqStart = MIRBuilder.buildInstr(AArch64::ADJCALLSTACKDOWN); + // Create a temporarily-floating call instruction so we can add the implicit // uses of arg registers. auto MIB = MIRBuilder.buildInstrNoInsert(Callee.isReg() ? AArch64::BLR @@ -329,5 +333,10 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, MIRBuilder.buildSequence(OrigRet.Reg, SplitRegs, RegOffsets); } + CallSeqStart.addImm(Handler.StackSize); + MIRBuilder.buildInstr(AArch64::ADJCALLSTACKUP) + .addImm(Handler.StackSize) + .addImm(0); + return true; } |