diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-11-27 18:05:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-11-27 18:05:00 +0000 |
| commit | 5fb34b5498f3349fb7cbe9039e35eb2fd635ff59 (patch) | |
| tree | 698b3b93a1b545cd75f8f217283c808ec31e2eb4 /llvm/lib/Support/Host.cpp | |
| parent | e3459295ee0760c5b0f794fba9e7d374198d88ce (diff) | |
| download | bcm5719-llvm-5fb34b5498f3349fb7cbe9039e35eb2fd635ff59.tar.gz bcm5719-llvm-5fb34b5498f3349fb7cbe9039e35eb2fd635ff59.zip | |
[X86] Add cascade lake arch in X86 target.
This is skylake-avx512 with the addition of avx512vnni ISA.
Patch by Jianping Chen
Differential Revision: https://reviews.llvm.org/D54785
llvm-svn: 347681
Diffstat (limited to 'llvm/lib/Support/Host.cpp')
| -rw-r--r-- | llvm/lib/Support/Host.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index 9f5bf1ffa12..d5a688c7fb9 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -702,6 +702,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, break; } + if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32))) { + *Type = X86::INTEL_COREI7; + *Subtype = X86::INTEL_COREI7_CASCADELAKE; + break; + } + if (Features & (1 << X86::FEATURE_AVX512VL)) { *Type = X86::INTEL_COREI7; *Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512; |
