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| author | Kang Zhang <shkzhang@cn.ibm.com> | 2019-04-18 07:24:15 +0000 |
|---|---|---|
| committer | Kang Zhang <shkzhang@cn.ibm.com> | 2019-04-18 07:24:15 +0000 |
| commit | 009a21d2fdff9117cafc853a2fe7e8355d2d31cc (patch) | |
| tree | b1da08dadad6873449d0f57db75029e384715c28 /llvm/lib/Passes/PassBuilder.cpp | |
| parent | 4f471ee99098d06b3ad74cd5ee06f82737bcbbd6 (diff) | |
| download | bcm5719-llvm-009a21d2fdff9117cafc853a2fe7e8355d2d31cc.tar.gz bcm5719-llvm-009a21d2fdff9117cafc853a2fe7e8355d2d31cc.zip | |
[PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS()
Summary:
This issue from the bugzilla: https://bugs.llvm.org/show_bug.cgi?id=41177
When the two operands for BUILD_VECTOR are same, we will get assert error.
llvm::SDValue combineBVOfConsecutiveLoads(llvm::SDNode*, llvm::SelectionDAG&):
Assertion `!(InputsAreConsecutiveLoads && InputsAreReverseConsecutive) &&
"The loads cannot be both consecutive and reverse consecutive."' failed.
This error caused by the wrong ElemSIze when calling isConsecutiveLS(). We
should use `getScalarType().getStoreSize();` to get the ElemSize instread of
`getScalarSizeInBits() / 8`.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D60811
llvm-svn: 358644
Diffstat (limited to 'llvm/lib/Passes/PassBuilder.cpp')
0 files changed, 0 insertions, 0 deletions
