From ca7fdd41bda02a24c401ecf75d306cea93c27fb5 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Fri, 3 Jan 2020 14:57:35 -0500
Subject: [DAGCombiner] fix miscompile in translating (X & undef) to shuffle

See PR42982 for more context:
https://bugs.llvm.org/show_bug.cgi?id=42982
---
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'llvm/lib/CodeGen')

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3bfea38932f..d401e7fb657 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -19769,8 +19769,10 @@ SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) {
       int EltIdx = i / Split;
       int SubIdx = i % Split;
       SDValue Elt = RHS.getOperand(EltIdx);
+      // X & undef --> 0 (not undef). So this lane must be converted to choose
+      // from the zero constant vector (same as if the element had all 0-bits).
       if (Elt.isUndef()) {
-        Indices.push_back(-1);
+        Indices.push_back(i + NumSubElts);
         continue;
       }
 
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