Enable sub-sub-register copy coalescing.

It is now possible to coalesce weird skewed sub-register copies by
picking a super-register class larger than both original registers. The
included test case produces code like this:

  vld2.32 {d16, d17, d18, d19}, [r0]!
  vst2.32 {d18, d19, d20, d21}, [r0]

We still perform interference checking as if it were a normal full copy
join, so this is still quite conservative. In particular, the f1 and f2
functions in the included test case still have remaining copies because
of false interference.

llvm-svn: 156878

1 files changed, 0 insertions, 9 deletions

diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 11ba9ac2bd1..6770c82af3b 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -278,15 +278,6 @@ bool CoalescerPair::setRegisters(const MachineInstr *MI) {
                                          SrcIdx, DstIdx);
       if (!NewRC)
         return false;
-
-      // We cannot handle the case where both Src and Dst would be a
-      // sub-register. Yet.
-      if (SrcIdx && DstIdx) {
-        DEBUG(dbgs() << "\tCannot handle " << NewRC->getName()
-                     << " with subregs " << TRI.getSubRegIndexName(SrcIdx)
-                     << " and " << TRI.getSubRegIndexName(DstIdx) << '\n');
-        return false;
-      }
     } else if (DstSub) {
       // SrcReg will be merged with a sub-register of DstReg.
       SrcIdx = DstSub;