diff options
| author | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2018-08-17 01:41:56 +0000 |
|---|---|---|
| committer | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2018-08-17 01:41:56 +0000 |
| commit | 973a557338ffce924d361a98979c1af10dc8d581 (patch) | |
| tree | 1a30617ec37ae6d0dbbfa6bbb50cac2a46c56095 /llvm/lib/CodeGen | |
| parent | be57e8e328696870abf4cf168e80114710476552 (diff) | |
| download | bcm5719-llvm-973a557338ffce924d361a98979c1af10dc8d581.tar.gz bcm5719-llvm-973a557338ffce924d361a98979c1af10dc8d581.zip | |
[GISel]: Add Opcodes for a few LLVM Intrinsics
https://reviews.llvm.org/D50401
Add opcodes for llvm.intrinsic.trunc, round, and update the IRTranslator
for the same.
Reviewed by: dsanders.
llvm-svn: 339977
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 74f51cc7292..3fda5cb9007 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -850,6 +850,16 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID, .addDef(getOrCreateVReg(CI)) .addUse(getOrCreateVReg(*CI.getArgOperand(0))); return true; + case Intrinsic::trunc: + MIRBuilder.buildInstr(TargetOpcode::G_INTRINSIC_TRUNC) + .addDef(getOrCreateVReg(CI)) + .addUse(getOrCreateVReg(*CI.getArgOperand(0))); + return true; + case Intrinsic::round: + MIRBuilder.buildInstr(TargetOpcode::G_INTRINSIC_ROUND) + .addDef(getOrCreateVReg(CI)) + .addUse(getOrCreateVReg(*CI.getArgOperand(0))); + return true; case Intrinsic::fma: MIRBuilder.buildInstr(TargetOpcode::G_FMA) .addDef(getOrCreateVReg(CI)) |
