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authorStephen Canon <scanon@apple.com>2018-07-19 22:46:42 +0000
committerStephen Canon <scanon@apple.com>2018-07-19 22:46:42 +0000
commit8995c5f0f617769edbfb3e7c8510957feaa27501 (patch)
tree5092f76d1fb5eea7bff5d76ceec38460a5723a4a /llvm/lib/CodeGen
parentdf81b979271c950811260bfd55609f116b80ec4a (diff)
downloadbcm5719-llvm-8995c5f0f617769edbfb3e7c8510957feaa27501.tar.gz
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Skip out of SimplifyDemandedBits for BITCAST of f16 to i16
Mirrors the existing exit path for f128, avoiding a crash later on. Differential Revision: https://reviews.llvm.org/D49524 llvm-svn: 337506
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index fbe74f27b8f..4c885f90363 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1187,6 +1187,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT);
bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
if ((OpVTLegal || i32Legal) && VT.isSimple() &&
+ Op.getOperand(0).getValueType() != MVT::f16 &&
Op.getOperand(0).getValueType() != MVT::f128) {
// Cannot eliminate/lower SHL for f128 yet.
EVT Ty = OpVTLegal ? VT : MVT::i32;
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