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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2018-05-21 21:41:02 +0000 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2018-05-21 21:41:02 +0000 |
| commit | 7772de25d07c977e41f8faa3bbf327033cd81c20 (patch) | |
| tree | 7b728f8308187d0334a44d96cff110090adba71e /llvm/lib/CodeGen | |
| parent | fd79bc3aa25fa19eafa6871c7a0a40dd680b4775 (diff) | |
| download | bcm5719-llvm-7772de25d07c977e41f8faa3bbf327033cd81c20.tar.gz bcm5719-llvm-7772de25d07c977e41f8faa3bbf327033cd81c20.zip | |
[DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.
Summary:
This **appears** to be the last missing piece for the masked merge pattern handling in the backend.
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].
[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andps`+`andnps` / `bsl` would be generated. (see `@out`)
Now, they would no longer be generated (see `@in`), and we need to make sure that they are generated.
Differential Revision: https://reviews.llvm.org/D46528
llvm-svn: 332904
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index fa4c1dd4aae..fc16a06bd99 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5391,10 +5391,6 @@ SDValue DAGCombiner::unfoldMaskedMerge(SDNode *N) { EVT VT = N->getValueType(0); - // FIXME - if (VT.isVector()) - return SDValue(); - // There are 3 commutable operators in the pattern, // so we have to deal with 8 possible variants of the basic pattern. SDValue X, Y, M; |
