From 87b85dd4dceac2d781eca0c4f19f7e2b8c8af354 Mon Sep 17 00:00:00 2001
From: Daniel Dunbar <daniel@zuster.org>
Date: Thu, 16 Jul 2009 22:08:25 +0000
Subject: Fix inverted preprocessor conditional.

llvm-svn: 76111
---
 llvm/lib/CodeGen/VirtRegRewriter.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'llvm/lib/CodeGen/VirtRegRewriter.cpp')

diff --git a/llvm/lib/CodeGen/VirtRegRewriter.cpp b/llvm/lib/CodeGen/VirtRegRewriter.cpp
index a859d80e1b7..61ea80b3d9d 100644
--- a/llvm/lib/CodeGen/VirtRegRewriter.cpp
+++ b/llvm/lib/CodeGen/VirtRegRewriter.cpp
@@ -491,7 +491,7 @@ static void ReMaterialize(MachineBasicBlock &MBB,
                           const TargetRegisterInfo *TRI,
                           VirtRegMap &VRM) {
   MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
-#ifdef NDEBUG
+#ifndef NDEBUG
   const TargetInstrDesc &TID = ReMatDefMI->getDesc();
   assert(TID.getNumDefs() != 1 &&
          "Don't know how to remat instructions that define > 1 values!");
-- 
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