diff options
author | Eric Christopher <echristo@gmail.com> | 2014-08-05 02:39:49 +0000 |
---|---|---|
committer | Eric Christopher <echristo@gmail.com> | 2014-08-05 02:39:49 +0000 |
commit | fc6de428c8ab10330e1b00c6541503cfd98a9cca (patch) | |
tree | a2f2e256682f7ec9c6affef81490a88327f6844c /llvm/lib/CodeGen/TargetSchedule.cpp | |
parent | 5beccb22bc151a6711e28a893ed1446ccae7ba13 (diff) | |
download | bcm5719-llvm-fc6de428c8ab10330e1b00c6541503cfd98a9cca.tar.gz bcm5719-llvm-fc6de428c8ab10330e1b00c6541503cfd98a9cca.zip |
Have MachineFunction cache a pointer to the subtarget to make lookups
shorter/easier and have the DAG use that to do the same lookup. This
can be used in the future for TargetMachine based caching lookups from
the MachineFunction easily.
Update the MIPS subtarget switching machinery to update this pointer
at the same time it runs.
llvm-svn: 214838
Diffstat (limited to 'llvm/lib/CodeGen/TargetSchedule.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetSchedule.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp index b176729027a..3d240a99733 100644 --- a/llvm/lib/CodeGen/TargetSchedule.cpp +++ b/llvm/lib/CodeGen/TargetSchedule.cpp @@ -290,8 +290,7 @@ computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, // for predicated defs. unsigned Reg = DefMI->getOperand(DefOperIdx).getReg(); const MachineFunction &MF = *DefMI->getParent()->getParent(); - const TargetRegisterInfo *TRI = - MF.getTarget().getSubtargetImpl()->getRegisterInfo(); + const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(DepMI)) return computeInstrLatency(DefMI); |