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author | Djordje Todorovic <djordje.todorovic@rt-rk.com> | 2019-07-09 11:33:56 +0000 |
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committer | Djordje Todorovic <djordje.todorovic@rt-rk.com> | 2019-07-09 11:33:56 +0000 |
commit | 01eaae6dd12862cda6b42d565a215b07a178aba6 (patch) | |
tree | 1100521e1eb7dce0a791709349f96a9efa16e432 /llvm/lib/CodeGen/TargetRegisterInfo.cpp | |
parent | 9b3f38f99085e2bbf9db01bb00d4c6d837f0fc00 (diff) | |
download | bcm5719-llvm-01eaae6dd12862cda6b42d565a215b07a178aba6.tar.gz bcm5719-llvm-01eaae6dd12862cda6b42d565a215b07a178aba6.zip |
[DwarfDebug] Dump call site debug info
Dump the DWARF information about call sites and call site parameters into
debug info sections.
The patch also provides an interface for the interpretation of instructions
that could load values of a call site parameters in order to generate DWARF
about the call site parameters.
([13/13] Introduce the debug entry values.)
Co-authored-by: Ananth Sowda <asowda@cisco.com>
Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
Co-authored-by: Ivan Baev <ibaev@cisco.com>
Differential Revision: https://reviews.llvm.org/D60716
llvm-svn: 365467
Diffstat (limited to 'llvm/lib/CodeGen/TargetRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetRegisterInfo.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp index f1b2ecf3243..b5a4419e6b8 100644 --- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp +++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp @@ -433,6 +433,20 @@ TargetRegisterInfo::getRegAllocationHints(unsigned VirtReg, return false; } +bool +TargetRegisterInfo::isCallerPreservedPhysReg(unsigned PhysReg, + const MachineFunction &MF) const { + if (PhysReg == 0) + return false; + const uint32_t *callerPreservedRegs = + getCallPreservedMask(MF, MF.getFunction().getCallingConv()); + if (callerPreservedRegs) { + assert(isPhysicalRegister(PhysReg) && "Expected physical register"); + return (callerPreservedRegs[PhysReg / 32] >> PhysReg % 32) & 1; + } + return false; +} + bool TargetRegisterInfo::canRealignStack(const MachineFunction &MF) const { return !MF.getFunction().hasFnAttribute("no-realign-stack"); } |