From f9acacaa928d7ba9db900c42893c244fb19714c4 Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Tue, 31 May 2016 22:38:06 +0000 Subject: CodeGen: Refactor renameDisconnectedComponents() as a pass Refactor LiveIntervals::renameDisconnectedComponents() to be a pass. Also change the name to "RenameIndependentSubregs": - renameDisconnectedComponents() worked on a MachineFunction at a time so it is a natural candidate for a machine function pass. - The algorithm is testable with a .mir test now. - This also fixes a problem where the lazy renaming as part of the MachineScheduler introduced IMPLICIT_DEF instructions after the number of a nodes in a region were counted leading to a mismatch. Differential Revision: http://reviews.llvm.org/D20507 llvm-svn: 271345 --- llvm/lib/CodeGen/TargetPassConfig.cpp | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'llvm/lib/CodeGen/TargetPassConfig.cpp') diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp index 4aebf76d779..a62ebadcb7f 100644 --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -775,6 +775,11 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) { addPass(&TwoAddressInstructionPassID, false); addPass(&RegisterCoalescerID); + // The machine scheduler may accidentally create disconnected components + // when moving subregister definitions around, avoid this by splitting them to + // separate vregs before. Splitting can also improve reg. allocation quality. + addPass(&RenameIndependentSubregsID); + // PreRA instruction scheduling. addPass(&MachineSchedulerID); -- cgit v1.2.3