summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2009-07-07 23:03:54 +0000
committerChris Lattner <sabre@nondot.org>2009-07-07 23:03:54 +0000
commitfc74e8241abb4393a97888ac7ab21fd71ac3ac46 (patch)
tree4e32bcbb31fcc42884cb2df98cb13d011a6540f5 /llvm/lib/CodeGen/SelectionDAG
parentcbbf747b7ba22acf3a930133f1b55abf04f1992d (diff)
downloadbcm5719-llvm-fc74e8241abb4393a97888ac7ab21fd71ac3ac46.tar.gz
bcm5719-llvm-fc74e8241abb4393a97888ac7ab21fd71ac3ac46.zip
add support for legalizing an icmp where the result is illegal (4xi1) but
the input is legal (4 x i32) llvm-svn: 74964
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp37
1 files changed, 30 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index f356809fbe1..d9eec27e26a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -891,15 +891,38 @@ void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
MVT LoVT, HiVT;
- DebugLoc dl = N->getDebugLoc();
+ DebugLoc DL = N->getDebugLoc();
GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
-
+
+ // Split the input.
+ MVT InVT = N->getOperand(0).getValueType();
SDValue LL, LH, RL, RH;
- GetSplitVector(N->getOperand(0), LL, LH);
- GetSplitVector(N->getOperand(1), RL, RH);
-
- Lo = DAG.getNode(N->getOpcode(), dl, LoVT, LL, RL, N->getOperand(2));
- Hi = DAG.getNode(N->getOpcode(), dl, HiVT, LH, RH, N->getOperand(2));
+ switch (getTypeAction(InVT)) {
+ default: assert(0 && "Unexpected type action!");
+ case WidenVector: assert(0 && "Unimp");
+ case Legal: {
+ assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
+ MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
+ LoVT.getVectorNumElements());
+ LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
+ DAG.getIntPtrConstant(0));
+ LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
+ DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
+
+ RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
+ DAG.getIntPtrConstant(0));
+ RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
+ DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
+ break;
+ }
+ case SplitVector:
+ GetSplitVector(N->getOperand(0), LL, LH);
+ GetSplitVector(N->getOperand(1), RL, RH);
+ break;
+ }
+
+ Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
+ Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
}
//===----------------------------------------------------------------------===//
OpenPOWER on IntegriCloud