diff options
| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-05-03 13:13:51 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-05-03 13:13:51 +0000 |
| commit | f3fc92d6fc763e08cb5f3599125039f88dc473e8 (patch) | |
| tree | caa7830be59f6ec5b1fa2183dabb4ccce1c6fe77 /llvm/lib/CodeGen/SelectionDAG | |
| parent | 0da755ee3e0b375a18282290465e57a45a725729 (diff) | |
| download | bcm5719-llvm-f3fc92d6fc763e08cb5f3599125039f88dc473e8.tar.gz bcm5719-llvm-f3fc92d6fc763e08cb5f3599125039f88dc473e8.zip | |
Add libcall expansion for 16 and 128 bit muls
llvm-svn: 70749
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 697caa6ddbb..98908765b73 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3315,10 +3315,14 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { } break; case ISD::MUL: + if (VT == MVT::i16) + LC = RTLIB::MUL_I16; if (VT == MVT::i32) LC = RTLIB::MUL_I32; else if (VT == MVT::i64) LC = RTLIB::MUL_I64; + else if (VT == MVT::i128) + LC = RTLIB::MUL_I128; break; case ISD::FPOW: LC = GetFPLibCall(VT, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80, |
