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authorCraig Topper <craig.topper@intel.com>2019-09-10 07:56:02 +0000
committerCraig Topper <craig.topper@intel.com>2019-09-10 07:56:02 +0000
commite8b432fa0e75430c03552b1d36e4ac468843ce57 (patch)
tree5f2cc604928d02d4f8bacc09f2888a04ca7ad9e5 /llvm/lib/CodeGen/SelectionDAG
parent60f0a6f6ff99a748b1190ad85b0bbc00c36584a1 (diff)
downloadbcm5719-llvm-e8b432fa0e75430c03552b1d36e4ac468843ce57.tar.gz
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[LegalizeTypes] Teach SoftenFloatOp_SELECT_CC to handle operand 2 or 3 being softened.
This can only happen on X86 when fp128 is a legal type, but we go through softening to generate libcalls. This causes fp128 to be softened to fp128 instead of an integer type. This can be removed if D67128 lands. llvm-svn: 371493
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp16
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h2
2 files changed, 15 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index b6455ab51bd..692f66aeae4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -874,7 +874,7 @@ bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break;
case ISD::LLRINT: Res = SoftenFloatOp_LLRINT(N); break;
case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break;
- case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
+ case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N, OpNo); break;
case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
case ISD::STORE:
Res = SoftenFloatOp_STORE(N, OpNo);
@@ -1090,7 +1090,19 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT(SDNode *N) {
0);
}
-SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
+SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
+ if (OpNo == 2 || OpNo == 3) {
+ SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
+ SDValue Op3 = GetSoftenedFloat(N->getOperand(3));
+
+ if (Op2 == N->getOperand(2) && Op3 == N->getOperand(3))
+ return SDValue();
+
+ return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1),
+ Op2, Op3, N->getOperand(4)),
+ 0);
+ }
+
SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index 4fd04229fc4..d566994e7ce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -560,7 +560,7 @@ private:
SDValue SoftenFloatOp_LRINT(SDNode *N);
SDValue SoftenFloatOp_LLRINT(SDNode *N);
SDValue SoftenFloatOp_SELECT(SDNode *N);
- SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
+ SDValue SoftenFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
SDValue SoftenFloatOp_SETCC(SDNode *N);
SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
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