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authorLewis Revill <lewis.revill@embecosm.com>2019-06-26 10:35:58 +0000
committerLewis Revill <lewis.revill@embecosm.com>2019-06-26 10:35:58 +0000
commitcf74881329d3b2bce063b70cbac85792a1b76b0f (patch)
tree2b17416cf5c6ffd6c3e19152208560a2f4a0e52b /llvm/lib/CodeGen/SelectionDAG
parente17a52ebeeb04fc2a860a80eec6e89683b0a7c42 (diff)
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[RISCV] Add pseudo instruction for calls with explicit register
This patch adds the PseudoCALLReg instruction which allows using an explicit register operand as the destination for the return address. GCC can successfully parse this form of the call instruction, which would be used for calls to functions which do not use ra as the return address register, such as the __riscv_save libcalls. This patch forms the first part of an implementation of -msave-restore for RISC-V. Differential Revision: https://reviews.llvm.org/D62685 llvm-svn: 364403
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