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| author | Sanjay Patel <spatel@rotateright.com> | 2019-03-26 20:54:15 +0000 | 
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2019-03-26 20:54:15 +0000 | 
| commit | bb5cba3cca070e0a7eb85ef25c513cd6b86ddd01 (patch) | |
| tree | 75e3a9ea201e0557e2a365e93ab5f9724681fbd4 /llvm/lib/CodeGen/SelectionDAG | |
| parent | e1d79a87c6487b3e475eaa3a0314fb9b49d98be0 (diff) | |
| download | bcm5719-llvm-bb5cba3cca070e0a7eb85ef25c513cd6b86ddd01.tar.gz bcm5719-llvm-bb5cba3cca070e0a7eb85ef25c513cd6b86ddd01.zip | |
[SDAG] add simplifications for FP at node creation time
We have the folds for fadd/fsub/fmul already in DAGCombiner,
so it may be possible to remove that code if we can guarantee that
these ops are zapped before they can exist.
llvm-svn: 357029
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 27 | 
1 files changed, 27 insertions, 0 deletions
| diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index e9ef4152da6..9534704a7dd 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -4931,6 +4931,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,      assert(VT.isFloatingPoint() && "This operator only applies to FP types!");      assert(N1.getValueType() == N2.getValueType() &&             N1.getValueType() == VT && "Binary operator types must match!"); +    if (SDValue V = simplifyFPBinop(Opcode, N1, N2)) +      return V;      break;    case ISD::FCOPYSIGN:   // N1 and result must match.  N1/N2 need not match.      assert(N1.getValueType() == VT && @@ -7053,6 +7055,31 @@ SDValue SelectionDAG::simplifyShift(SDValue X, SDValue Y) {    return SDValue();  } +// TODO: Use fast-math-flags to enable more simplifications. +SDValue SelectionDAG::simplifyFPBinop(unsigned Opcode, SDValue X, SDValue Y) { +  ConstantFPSDNode *YC = isConstOrConstSplatFP(Y, /* AllowUndefs */ true); +  if (!YC) +    return SDValue(); + +  // X + -0.0 --> X +  if (Opcode == ISD::FADD) +    if (YC->getValueAPF().isNegZero()) +      return X; + +  // X - +0.0 --> X +  if (Opcode == ISD::FSUB) +    if (YC->getValueAPF().isPosZero()) +      return X; + +  // X * 1.0 --> X +  // X / 1.0 --> X +  if (Opcode == ISD::FMUL || Opcode == ISD::FDIV) +    if (YC->getValueAPF().isExactlyValue(1.0)) +      return X; + +  return SDValue(); +} +  SDValue SelectionDAG::getVAArg(EVT VT, const SDLoc &dl, SDValue Chain,                                 SDValue Ptr, SDValue SV, unsigned Align) {    SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) }; | 

