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authorDan Gohman <gohman@apple.com>2009-01-03 19:22:06 +0000
committerDan Gohman <gohman@apple.com>2009-01-03 19:22:06 +0000
commitb9fa1d24f89d0c34e77dd855797017185ab9ba8d (patch)
tree17d230a508322752e46621b45b230a66344a2e07 /llvm/lib/CodeGen/SelectionDAG
parent4d41fdf4cabc01dddcb36cd420d83debf90460e3 (diff)
downloadbcm5719-llvm-b9fa1d24f89d0c34e77dd855797017185ab9ba8d.tar.gz
bcm5719-llvm-b9fa1d24f89d0c34e77dd855797017185ab9ba8d.zip
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
llvm-svn: 61613
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4fb50e30dbe..f1e43a90246 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3277,6 +3277,8 @@ SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) {
if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
// See if we can recursively simplify the LHS.
unsigned Amt = RHSC->getZExtValue();
+ // Watch out for shift count overflow though.
+ if (Amt >= Mask.getBitWidth()) break;
APInt NewMask = Mask << Amt;
SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask);
if (SimplifyLHS.getNode()) {
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