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author | Evan Cheng <evan.cheng@apple.com> | 2008-01-30 19:35:32 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-01-30 19:35:32 +0000 |
commit | a3ff8e6110cc1e1a2d92e05c13382568219b1f6f (patch) | |
tree | a0ea44ab820c483fb4e25ce121da6c36a3bad9a9 /llvm/lib/CodeGen/SelectionDAG | |
parent | 540d03bda92489e7419176ddd3974a6b70b72d12 (diff) | |
download | bcm5719-llvm-a3ff8e6110cc1e1a2d92e05c13382568219b1f6f.tar.gz bcm5719-llvm-a3ff8e6110cc1e1a2d92e05c13382568219b1f6f.zip |
A semi-gross fix for a debug info issue. When inserting the "function start" label (i.e. first label in the entry block) take care to insert it at the beginning of the block.
llvm-svn: 46568
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 35 |
1 files changed, 26 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 543a9fb9dce..1b53beddf76 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -31,6 +31,7 @@ ScheduleDAG::ScheduleDAG(SelectionDAG &dag, MachineBasicBlock *bb, const TargetMachine &tm) : DAG(dag), BB(bb), TM(tm), RegInfo(BB->getParent()->getRegInfo()) { TII = TM.getInstrInfo(); + MF = &DAG.getMachineFunction(); MRI = TM.getRegisterInfo(); ConstPool = BB->getParent()->getConstantPool(); } @@ -710,13 +711,30 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo, } // Now that we have emitted all operands, emit this instruction itself. - if (!II.usesCustomDAGSchedInsertionHook()) { - BB->insert(BB->end(), MI); - } else { - // Insert this instruction into the end of the basic block, potentially - // taking some custom action. + if (Opc == TargetInstrInfo::LABEL && + !BB->empty() && &MF->front() == BB) { + // If we are inserting a LABEL and this happens to be the first label in + // the entry block, it is the "function start" label. Make sure there are + // no other instructions before it. + bool SeenLabel = false; + MachineBasicBlock::iterator MBBI = BB->begin(); + while (MBBI != BB->end()) { + if (MBBI->getOpcode() == TargetInstrInfo::LABEL) { + SeenLabel = true; + break; + } + ++MBBI; + } + if (!SeenLabel) + BB->insert(BB->begin(), MI); + else + BB->push_back(MI); + } else if (II.usesCustomDAGSchedInsertionHook()) + // Insert this instruction into the basic block using a target + // specific inserter which may returns a new basic block. BB = DAG.getTargetLoweringInfo().EmitInstrWithCustomInserter(MI, BB); - } + else + BB->push_back(MI); // Additional results must be an physical register def. if (HasPhysRegOuts) { @@ -870,13 +888,12 @@ void ScheduleDAG::EmitSchedule() { // If this is the first basic block in the function, and if it has live ins // that need to be copied into vregs, emit the copies into the top of the // block before emitting the code for the block. - MachineFunction &MF = DAG.getMachineFunction(); - if (&MF.front() == BB) { + if (&MF->front() == BB) { for (MachineRegisterInfo::livein_iterator LI = RegInfo.livein_begin(), E = RegInfo.livein_end(); LI != E; ++LI) if (LI->second) { const TargetRegisterClass *RC = RegInfo.getRegClass(LI->second); - TII->copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second, + TII->copyRegToReg(*MF->begin(), MF->begin()->end(), LI->second, LI->first, RC, RC); } } |