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| author | Evan Cheng <evan.cheng@apple.com> | 2005-12-21 23:05:39 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2005-12-21 23:05:39 +0000 |
| commit | 9cdc16c6d362533e7f368c4f8f78df0597fe2925 (patch) | |
| tree | 2202e3e3f4d03cd26dc89619e106eaae1ad0d137 /llvm/lib/CodeGen/SelectionDAG | |
| parent | 02767195bb688fa4d246bdaad93660656588e962 (diff) | |
| download | bcm5719-llvm-9cdc16c6d362533e7f368c4f8f78df0597fe2925.tar.gz bcm5719-llvm-9cdc16c6d362533e7f368c4f8f78df0597fe2925.zip | |
* Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index ddd8549a09f..87c6cf0f90a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -455,7 +455,10 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, // Bit counting instructions can not set the high bits of the result // register. The max number of bits sets depends on the input. return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; - default: break; + default: + if (Op.getOpcode() >= ISD::BUILTIN_OP_END) + return TLI.isMaskedValueZeroForTargetNode(Op, Mask); + break; } return false; } |
