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| author | Clement Courbet <courbet@google.com> | 2018-12-11 13:38:43 +0000 |
|---|---|---|
| committer | Clement Courbet <courbet@google.com> | 2018-12-11 13:38:43 +0000 |
| commit | 8b6434bbb9f9414e88c462c0761b2bd50ef65d92 (patch) | |
| tree | cd1de3c24af4d425031387f28d0b45f7e5b9c768 /llvm/lib/CodeGen/SelectionDAG | |
| parent | 93b344577077b9fcaddac273a5544c850f4dee12 (diff) | |
| download | bcm5719-llvm-8b6434bbb9f9414e88c462c0761b2bd50ef65d92.tar.gz bcm5719-llvm-8b6434bbb9f9414e88c462c0761b2bd50ef65d92.zip | |
Revert r348843 "[CodeGen] Allow mempcy/memset to generate small overlapping stores."
Breaks ARM/memcpy-inline.ll
llvm-svn: 348844
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index b9afcc13b3d..01364944b22 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5395,10 +5395,12 @@ static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, // If the new VT cannot cover all of the remaining bits, then consider // issuing a (or a pair of) unaligned and overlapping load / store. + // FIXME: Only does this for 64-bit or more since we don't have proper + // cost model for unaligned load / store. bool Fast; - if (NumMemOps && AllowOverlap && NewVTSize < Size && - TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && - Fast) + if (NumMemOps && AllowOverlap && + VTSize >= 8 && NewVTSize < Size && + TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast) VTSize = Size; else { VT = NewVT; |
