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| author | Craig Topper <craig.topper@gmail.com> | 2017-04-12 18:39:27 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-04-12 18:39:27 +0000 |
| commit | 8b459c24f34c6772bd637090b118859b154d5da3 (patch) | |
| tree | 829755de794259eccaae008cb6e4a4ff3179008b /llvm/lib/CodeGen/SelectionDAG | |
| parent | dd4b4325ee2658ec5eff34bb6e695f6071a4dd61 (diff) | |
| download | bcm5719-llvm-8b459c24f34c6772bd637090b118859b154d5da3.tar.gz bcm5719-llvm-8b459c24f34c6772bd637090b118859b154d5da3.zip | |
[SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.
llvm-svn: 300091
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 034591a00fe..c2a4b55ee1b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -731,8 +731,8 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, } } - KnownZero = KnownZeroOut; - KnownOne = KnownOneOut; + KnownZero = std::move(KnownZeroOut); + KnownOne = std::move(KnownOneOut); break; case ISD::SELECT: if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero, |
