summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorBenjamin Kramer <benny.kra@googlemail.com>2013-05-21 08:51:09 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2013-05-21 08:51:09 +0000
commit8aaf1979901efcb3b4de27ccb9cce4a57eaa3779 (patch)
treeeaaa5f242f9ac11dad86e95b0b3f247c5ba9cdd3 /llvm/lib/CodeGen/SelectionDAG
parent3b105a063fe68d4e6f6b278b69761cefb7e63bef (diff)
downloadbcm5719-llvm-8aaf1979901efcb3b4de27ccb9cce4a57eaa3779.tar.gz
bcm5719-llvm-8aaf1979901efcb3b4de27ccb9cce4a57eaa3779.zip
DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0) == 0.
Fixes PR16083. llvm-svn: 182357
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 36add035159..e8b6c04a48f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1162,7 +1162,8 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
}
// Make sure we're not losing bits from the constant.
- if (MinBits < C1.getBitWidth() && MinBits >= C1.getActiveBits()) {
+ if (MinBits > 0 &&
+ MinBits < C1.getBitWidth() && MinBits >= C1.getActiveBits()) {
EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
// Will get folded away.
OpenPOWER on IntegriCloud