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| author | Nirav Dave <niravd@google.com> | 2017-12-06 15:30:13 +0000 |
|---|---|---|
| committer | Nirav Dave <niravd@google.com> | 2017-12-06 15:30:13 +0000 |
| commit | 7d8f3e0c932931ba7e3743d1b0f25466054000aa (patch) | |
| tree | cde59ea9839f7021c61f5cfd5585a7d5f46acf13 /llvm/lib/CodeGen/SelectionDAG | |
| parent | 2e004b3ddb717e5a673c894d77e2c088eb27e65c (diff) | |
| download | bcm5719-llvm-7d8f3e0c932931ba7e3743d1b0f25466054000aa.tar.gz bcm5719-llvm-7d8f3e0c932931ba7e3743d1b0f25466054000aa.zip | |
[ARM][AArch64][DAG] Reenable post-legalize store merge
Reenable post-legalize stores with constant merging computation and
corresponding test case.
* Properly truncate store merge constants
* Disable merging of truncated stores floating points
* Ensure merges of constant stores into a single vector are
constructed from legal elements.
Reviewers: eastig, efriedma
Reviewed By: eastig
Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D40701
llvm-svn: 319899
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 7f02a643c0a..7ab6a3e03fa 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -12642,15 +12642,14 @@ bool DAGCombiner::MergeStoresOfConstantsOrVecElts( if (ElementSizeBits != Val.getValueSizeInBits()) { EVT IntMemVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits()); - if (auto *CFP = dyn_cast<ConstantFPSDNode>(Val)) - Val = DAG.getConstant( - CFP->getValueAPF().bitcastToAPInt().zextOrTrunc( - ElementSizeBits), - SDLoc(CFP), IntMemVT); - else if (auto *C = dyn_cast<ConstantSDNode>(Val)) - Val = DAG.getConstant( - C->getAPIntValue().zextOrTrunc(ElementSizeBits), - SDLoc(C), IntMemVT); + if (isa<ConstantFPSDNode>(Val)) { + // Not clear how to truncate FP values. + return false; + } else if (auto *C = dyn_cast<ConstantSDNode>(Val)) + Val = DAG.getConstant(C->getAPIntValue() + .zextOrTrunc(Val.getValueSizeInBits()) + .zextOrTrunc(ElementSizeBits), + SDLoc(C), IntMemVT); } // Make sure correctly size type is the correct type. Val = DAG.getBitcast(MemVT, Val); @@ -12713,9 +12712,17 @@ bool DAGCombiner::MergeStoresOfConstantsOrVecElts( SDValue Val = St->getValue(); StoreInt <<= ElementSizeBits; if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val)) { - StoreInt |= C->getAPIntValue().zextOrTrunc(SizeInBits); + StoreInt |= C->getAPIntValue() + .zextOrTrunc(ElementSizeBits) + .zextOrTrunc(SizeInBits); } else if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Val)) { - StoreInt |= C->getValueAPF().bitcastToAPInt().zextOrTrunc(SizeInBits); + StoreInt |= C->getValueAPF() + .bitcastToAPInt() + .zextOrTrunc(ElementSizeBits) + .zextOrTrunc(SizeInBits); + // If fp truncation is necessary give up for now. + if (MemVT.getSizeInBits() != ElementSizeBits) + return false; } else { llvm_unreachable("Invalid constant element type"); } @@ -13065,7 +13072,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) { // Find a legal type for the vector store. unsigned Elts = (i + 1) * NumMemElts; EVT Ty = EVT::getVectorVT(Context, MemVT.getScalarType(), Elts); - if (TLI.isTypeLegal(Ty) && + if (TLI.isTypeLegal(Ty) && TLI.isTypeLegal(MemVT) && TLI.canMergeStoresTo(FirstStoreAS, Ty, DAG) && TLI.allowsMemoryAccess(Context, DL, Ty, FirstStoreAS, FirstStoreAlign, &IsFast) && |
