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authorMon P Wang <wangmp@apple.com>2010-02-01 19:03:18 +0000
committerMon P Wang <wangmp@apple.com>2010-02-01 19:03:18 +0000
commit72c60c73af6dbdf8a0543f6614c6d565d75b5342 (patch)
treeb815f431b7cb2b8f99da8c4a96fdb52b1c06c5f7 /llvm/lib/CodeGen/SelectionDAG
parent36bca4e4baa1acf49708f0cf881dfdbaa79e1678 (diff)
downloadbcm5719-llvm-72c60c73af6dbdf8a0543f6614c6d565d75b5342.tar.gz
bcm5719-llvm-72c60c73af6dbdf8a0543f6614c6d565d75b5342.zip
Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the result
type is the same as the element type of the vector. EXTRACT_VECTOR_ELT can be used to extended the width of an integer type. This fixes a bug for Generic/vector-casts.ll on a ppc750. llvm-svn: 94990
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp15
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp2
2 files changed, 12 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 640bdc091ca..6729a93fd71 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5403,12 +5403,19 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
SDValue InVec = N->getOperand(0);
if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR) {
- // If the operand is wider than the vector element type then it is implicitly
- // truncated. Make that explicit here.
+ // Check if the result type doesn't match the inserted element type. A
+ // SCALAR_TO_VECTOR may truncate the inserted element and the
+ // EXTRACT_VECTOR_ELT may widen the extracted vector.
EVT EltVT = InVec.getValueType().getVectorElementType();
SDValue InOp = InVec.getOperand(0);
- if (InOp.getValueType() != EltVT)
- return DAG.getNode(ISD::TRUNCATE, InVec.getDebugLoc(), EltVT, InOp);
+ EVT NVT = N->getValueType(0);
+ if (InOp.getValueType() != NVT) {
+ assert(InOp.getValueType().isInteger() && NVT.isInteger());
+ if (NVT.getSizeInBits() > InOp.getValueType().getSizeInBits())
+ return DAG.getNode(ISD::SIGN_EXTEND, InVec.getDebugLoc(), NVT, InOp);
+ else
+ return DAG.getNode(ISD::TRUNCATE, InVec.getDebugLoc(), NVT, InOp);
+ }
return InOp;
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 4f26cdeaeb4..2e92f8f1fd1 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2765,7 +2765,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
// operations are lowered to scalars.
if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
// If the indices are the same, return the inserted element.
- if (N1.getOperand(2) == N2)
+ if (N1.getOperand(2) == N2 && VT == N1.getOperand(1).getValueType())
return N1.getOperand(1);
// If the indices are known different, extract the element from
// the original vector.
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