summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2016-03-01 20:25:43 +0000
committerVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2016-03-01 20:25:43 +0000
commit36901dd1c3b27b5a954c6f78b8ae7d6580ce2e12 (patch)
tree06dc0adb91b78e4dbdf3dc16e01fe19ccc4f6507 /llvm/lib/CodeGen/SelectionDAG
parent01cd2e7a4bc6af6fd33f1c4f8284b5d184dcec7b (diff)
downloadbcm5719-llvm-36901dd1c3b27b5a954c6f78b8ae7d6580ce2e12.tar.gz
bcm5719-llvm-36901dd1c3b27b5a954c6f78b8ae7d6580ce2e12.zip
Revert "[mips] Promote the result of SETCC nodes to GPR width."
This reverts commit r262316. It seems that my change breaks an out-of-tree chromium buildbot, so I'm reverting this in order to investigate the situation further. llvm-svn: 262387
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp2
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp5
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp12
4 files changed, 6 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d2d48ea936b..4120e79e667 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14159,7 +14159,8 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
Temp = DAG.getZeroExtendInReg(SCC, SDLoc(N2),
N2.getValueType());
else
- Temp = DAG.getZExtOrTrunc(SCC, SDLoc(N2), N2.getValueType());
+ Temp = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N2),
+ N2.getValueType(), SCC);
} else {
SCC = DAG.getSetCC(SDLoc(N0), MVT::i1, N0, N1, CC);
Temp = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N2),
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 60e82402a3d..abbfb1fdc1a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -520,7 +520,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_MGATHER(MaskedGatherSDNode *N) {
/// Promote the overflow flag of an overflowing arithmetic node.
SDValue DAGTypeLegalizer::PromoteIntRes_Overflow(SDNode *N) {
// Simply change the return type of the boolean result.
- EVT NVT = getSetCCResultType(N->getValueType(1));
+ EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(1));
EVT ValueVTs[] = { N->getValueType(0), NVT };
SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
SDValue Res = DAG.getNode(N->getOpcode(), SDLoc(N),
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
index 67ec0058ac0..2a0b0aa4479 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -750,9 +750,8 @@ void DAGTypeLegalizer::ReplaceValueWith(SDValue From, SDValue To) {
}
void DAGTypeLegalizer::SetPromotedInteger(SDValue Op, SDValue Result) {
- assert(((Result.getValueType() ==
- TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType())) ||
- (Result.getValueType() == getSetCCResultType(Op.getValueType()))) &&
+ assert(Result.getValueType() ==
+ TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
"Invalid type for promoted integer");
AnalyzeNewValue(Result);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index a2e7eca127d..d63cbe681cc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -3656,9 +3656,6 @@ void SelectionDAGBuilder::visitMaskedGather(const CallInst &I) {
}
void SelectionDAGBuilder::visitAtomicCmpXchg(const AtomicCmpXchgInst &I) {
- const TargetLowering &TLI = DAG.getTargetLoweringInfo();
- LLVMContext &Ctx = *DAG.getContext();
-
SDLoc dl = getCurSDLoc();
AtomicOrdering SuccessOrder = I.getSuccessOrdering();
AtomicOrdering FailureOrder = I.getFailureOrdering();
@@ -3667,14 +3664,7 @@ void SelectionDAGBuilder::visitAtomicCmpXchg(const AtomicCmpXchgInst &I) {
SDValue InChain = getRoot();
MVT MemVT = getValue(I.getCompareOperand()).getSimpleValueType();
- EVT CCVT = TLI.getSetCCResultType(DAG.getDataLayout(), Ctx, MVT::i1);
-
- // Only use the result of getSetCCResultType if it is legal,
- // otherwise just use the promoted result type (NVT).
- if (!TLI.isTypeLegal(CCVT))
- CCVT = TLI.getTypeToTransformTo(Ctx, MVT::i1);
-
- SDVTList VTs = DAG.getVTList(MemVT, CCVT, MVT::Other);
+ SDVTList VTs = DAG.getVTList(MemVT, MVT::i1, MVT::Other);
SDValue L = DAG.getAtomicCmpSwap(
ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, dl, MemVT, VTs, InChain,
getValue(I.getPointerOperand()), getValue(I.getCompareOperand()),
OpenPOWER on IntegriCloud