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| author | Scott Michel <scottm@aero.org> | 2008-11-24 18:20:46 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-11-24 18:20:46 +0000 |
| commit | 2e5df906f823fdc84b14095e877c3c4dda1b4b1d (patch) | |
| tree | f95a5d59d4d629a22bec0f897fa5295b7b9a740f /llvm/lib/CodeGen/SelectionDAG | |
| parent | 5cc12a8e31832165dfec8e631d7efa85ea337dc5 (diff) | |
| download | bcm5719-llvm-2e5df906f823fdc84b14095e877c3c4dda1b4b1d.tar.gz bcm5719-llvm-2e5df906f823fdc84b14095e877c3c4dda1b4b1d.zip | |
CellSPU:
(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to
directly zero-extend i32 to i64, but use rotates and shifts for
sign extension. Also ensure unified register consistency.
(b) Add new test harness for i64 operations: i64ops.ll
llvm-svn: 59970
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
0 files changed, 0 insertions, 0 deletions
