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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-05-08 18:43:05 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-05-08 18:43:05 +0000 |
| commit | 1f61c0792c9ed40174a332178ae83894f9f3aa56 (patch) | |
| tree | 8a4342188aad665ba07f5987ad82eb09a099cde8 /llvm/lib/CodeGen/SelectionDAG | |
| parent | e21fbe5af20fb2c5e0989d0f1bb62b7773527d86 (diff) | |
| download | bcm5719-llvm-1f61c0792c9ed40174a332178ae83894f9f3aa56.tar.gz bcm5719-llvm-1f61c0792c9ed40174a332178ae83894f9f3aa56.zip | |
DAG: Use correct shift width type
llvm-svn: 331792
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp index f3845dc8fed..e2cee0717cb 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp @@ -1076,7 +1076,7 @@ SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi); Hi = DAG.getNode(ISD::SHL, dlHi, NVT, Hi, DAG.getConstant(LVT.getSizeInBits(), dlHi, - TLI.getPointerTy(DAG.getDataLayout()))); + TLI.getShiftAmountTy(NVT, DAG.getDataLayout()))); return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi); } |
