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| author | Craig Topper <craig.topper@intel.com> | 2019-08-29 05:13:56 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-08-29 05:13:56 +0000 |
| commit | 1aadf6f39f41e350a1ba93968dca980647da0b89 (patch) | |
| tree | 34f5fa7198399b4fb916d3f39857985afc14a749 /llvm/lib/CodeGen/SelectionDAG | |
| parent | 3177b92231ae9b350909deea32109a7f2a58b022 (diff) | |
| download | bcm5719-llvm-1aadf6f39f41e350a1ba93968dca980647da0b89.tar.gz bcm5719-llvm-1aadf6f39f41e350a1ba93968dca980647da0b89.zip | |
[X86] Make inline assembly 'x' and 'v' constraints work for f128.
Including a type legalizer fix to make bitcast operand promotion
work correctly when getSoftenedFloat returns f128 instead of i128.
Fixes PR43157
llvm-svn: 370293
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 9c99de35c89..6686b871582 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -895,8 +895,12 @@ bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) { } SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) { - return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), - GetSoftenedFloat(N->getOperand(0))); + SDValue Op0 = GetSoftenedFloat(N->getOperand(0)); + + if (Op0 == N->getOperand(0)) + return SDValue(); + + return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), Op0); } SDValue DAGTypeLegalizer::SoftenFloatOp_COPY_TO_REG(SDNode *N) { |
