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| author | Nirav Dave <niravd@google.com> | 2018-06-01 15:05:05 +0000 |
|---|---|---|
| committer | Nirav Dave <niravd@google.com> | 2018-06-01 15:05:05 +0000 |
| commit | 0fc27acaa2a200c1134b2ede73a36cc88d34d0e9 (patch) | |
| tree | c5c9fe6d01e54f052ff13b81bb0ef04554e27c91 /llvm/lib/CodeGen/SelectionDAG | |
| parent | a74921a6962a2f4c3a7b63ad293c4db7de2b0a23 (diff) | |
| download | bcm5719-llvm-0fc27acaa2a200c1134b2ede73a36cc88d34d0e9.tar.gz bcm5719-llvm-0fc27acaa2a200c1134b2ede73a36cc88d34d0e9.zip | |
[DAG] Remove untriggerable check. NFCI.
Candidate check precludes this check.
llvm-svn: 333764
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 82c1514146d..3dd0296c1ec 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -13647,16 +13647,6 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) { unsigned FirstStoreAlign = FirstInChain->getAlignment(); unsigned NumStoresToMerge = 1; for (unsigned i = 0; i < NumConsecutiveStores; ++i) { - StoreSDNode *St = cast<StoreSDNode>(StoreNodes[i].MemNode); - SDValue StVal = peekThroughBitcast(St->getValue()); - // This restriction could be loosened. - // Bail out if any stored values are not elements extracted from a - // vector. It should be possible to handle mixed sources, but load - // sources need more careful handling (see the block of code below that - // handles consecutive loads). - if (StVal.getOpcode() != ISD::EXTRACT_VECTOR_ELT && - StVal.getOpcode() != ISD::EXTRACT_SUBVECTOR) - return RV; // Find a legal type for the vector store. unsigned Elts = (i + 1) * NumMemElts; |

