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authorReid Kleckner <rnk@google.com>2016-12-30 00:21:38 +0000
committerReid Kleckner <rnk@google.com>2016-12-30 00:21:38 +0000
commit0e7c84c682df71836d1cea80d8e5e11ada29af25 (patch)
tree252de40981006e268d0ba1d3b4325093becd020d /llvm/lib/CodeGen/SelectionDAG
parente8ee89f8b01439b6812bf15ab946b87c9e0599f1 (diff)
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Simplify FunctionLoweringInfo.cpp with range for loops
I'm preparing to add some pattern matching code here, so simplify the code before I do. NFC llvm-svn: 290731
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp71
1 files changed, 31 insertions, 40 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index 7c814bf4b90..377a5237f15 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -125,11 +125,9 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
// Initialize the mapping of values to registers. This is only set up for
// instruction values that are used outside of the block that defines
// them.
- Function::const_iterator BB = Fn->begin(), EB = Fn->end();
- for (; BB != EB; ++BB)
- for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
- I != E; ++I) {
- if (const AllocaInst *AI = dyn_cast<AllocaInst>(I)) {
+ for (const BasicBlock &BB : *Fn) {
+ for (const Instruction &I : BB) {
+ if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
Type *Ty = AI->getAllocatedType();
unsigned Align =
std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
@@ -138,7 +136,7 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
// Static allocas can be folded into the initial stack frame
// adjustment. For targets that don't realign the stack, don't
// do this if there is an extra alignment requirement.
- if (AI->isStaticAlloca() &&
+ if (AI->isStaticAlloca() &&
(TFI->isStackRealignable() || (Align <= StackAlign))) {
const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
@@ -175,14 +173,13 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
// Look for inline asm that clobbers the SP register.
if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
- ImmutableCallSite CS(&*I);
+ ImmutableCallSite CS(&I);
if (isa<InlineAsm>(CS.getCalledValue())) {
unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
std::vector<TargetLowering::AsmOperandInfo> Ops =
TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
- for (size_t I = 0, E = Ops.size(); I != E; ++I) {
- TargetLowering::AsmOperandInfo &Op = Ops[I];
+ for (TargetLowering::AsmOperandInfo &Op : Ops) {
if (Op.Type == InlineAsm::isClobber) {
// Clobbers don't have SDValue operands, hence SDValue().
TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
@@ -199,28 +196,28 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
// Look for calls to the @llvm.va_start intrinsic. We can omit some
// prologue boilerplate for variadic functions that don't examine their
// arguments.
- if (const auto *II = dyn_cast<IntrinsicInst>(I)) {
+ if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
if (II->getIntrinsicID() == Intrinsic::vastart)
MF->getFrameInfo().setHasVAStart(true);
}
// If we have a musttail call in a variadic function, we need to ensure we
// forward implicit register parameters.
- if (const auto *CI = dyn_cast<CallInst>(I)) {
+ if (const auto *CI = dyn_cast<CallInst>(&I)) {
if (CI->isMustTailCall() && Fn->isVarArg())
MF->getFrameInfo().setHasMustTailInVarArgFunc(true);
}
// Mark values used outside their block as exported, by allocating
// a virtual register for them.
- if (isUsedOutsideOfDefiningBlock(&*I))
- if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(I)))
- InitializeRegForValue(&*I);
+ if (isUsedOutsideOfDefiningBlock(&I))
+ if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
+ InitializeRegForValue(&I);
// Collect llvm.dbg.declare information. This is done now instead of
// during the initial isel pass through the IR so that it is done
// in a predictable order.
- if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
+ if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(&I)) {
assert(DI->getVariable() && "Missing variable");
assert(DI->getDebugLoc() && "Missing location");
if (MMI.hasDebugInfo()) {
@@ -245,47 +242,52 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
}
// Decide the preferred extend type for a value.
- PreferredExtendType[&*I] = getPreferredExtendForValue(&*I);
+ PreferredExtendType[&I] = getPreferredExtendForValue(&I);
}
+ }
// Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
// also creates the initial PHI MachineInstrs, though none of the input
// operands are populated.
- for (BB = Fn->begin(); BB != EB; ++BB) {
+ for (const BasicBlock &BB : *Fn) {
// Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
// are really data, and no instructions can live here.
- if (BB->isEHPad()) {
- const Instruction *I = BB->getFirstNonPHI();
+ if (BB.isEHPad()) {
+ const Instruction *PadInst = BB.getFirstNonPHI();
// If this is a non-landingpad EH pad, mark this function as using
// funclets.
// FIXME: SEH catchpads do not create funclets, so we could avoid setting
// this in such cases in order to improve frame layout.
- if (!isa<LandingPadInst>(I)) {
+ if (!isa<LandingPadInst>(PadInst)) {
MF->setHasEHFunclets(true);
MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
}
- if (isa<CatchSwitchInst>(I)) {
- assert(&*BB->begin() == I &&
+ if (isa<CatchSwitchInst>(PadInst)) {
+ assert(&*BB.begin() == PadInst &&
"WinEHPrepare failed to remove PHIs from imaginary BBs");
continue;
}
- if (isa<FuncletPadInst>(I))
- assert(&*BB->begin() == I && "WinEHPrepare failed to demote PHIs");
+ if (isa<FuncletPadInst>(PadInst))
+ assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
}
- MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(&*BB);
- MBBMap[&*BB] = MBB;
+ MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(&BB);
+ MBBMap[&BB] = MBB;
MF->push_back(MBB);
// Transfer the address-taken flag. This is necessary because there could
// be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
// the first one should be marked.
- if (BB->hasAddressTaken())
+ if (BB.hasAddressTaken())
MBB->setHasAddressTaken();
+ // Mark landing pad blocks.
+ if (BB.isEHPad())
+ MBB->setIsEHPad();
+
// Create Machine PHI nodes for LLVM PHI nodes, lowering them as
// appropriate.
- for (BasicBlock::const_iterator I = BB->begin();
+ for (BasicBlock::const_iterator I = BB.begin();
const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
if (PN->use_empty()) continue;
@@ -299,8 +301,7 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
SmallVector<EVT, 4> ValueVTs;
ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs);
- for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
- EVT VT = ValueVTs[vti];
+ for (EVT VT : ValueVTs) {
unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
for (unsigned i = 0; i != NumRegisters; ++i)
@@ -310,16 +311,6 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
}
}
- // Mark landing pad blocks.
- SmallVector<const LandingPadInst *, 4> LPads;
- for (BB = Fn->begin(); BB != EB; ++BB) {
- const Instruction *FNP = BB->getFirstNonPHI();
- if (BB->isEHPad() && MBBMap.count(&*BB))
- MBBMap[&*BB]->setIsEHPad();
- if (const auto *LPI = dyn_cast<LandingPadInst>(FNP))
- LPads.push_back(LPI);
- }
-
if (!isFuncletEHPersonality(Personality))
return;
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