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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-11-14 18:46:52 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-11-14 18:46:52 +0000 |
| commit | 0b2f73fd84ca59735efdec4b230941634b59e485 (patch) | |
| tree | 0dffcb448c92d70a8735c41df406513a843d55a7 /llvm/lib/CodeGen/SelectionDAG | |
| parent | 99e2c41c1aecb77d1b7f3ab74ced9db2a54e5386 (diff) | |
| download | bcm5719-llvm-0b2f73fd84ca59735efdec4b230941634b59e485.tar.gz bcm5719-llvm-0b2f73fd84ca59735efdec4b230941634b59e485.zip | |
CodeGen: Fix TargetLowering::LowerCallTo for sret value type
TargetLowering::LowerCallTo assumes that sret value type corresponds to a
pointer in default address space, which is incorrect, since sret value type
should correspond to a pointer in alloca address space, which may not
be the default address space. This causes assertion for amdgcn target
in amdgiz environment.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39996
llvm-svn: 318167
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index e0155e73f55..7410a7adecc 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -8306,7 +8306,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const { // The instruction result is the result of loading from the // hidden sret parameter. SmallVector<EVT, 1> PVTs; - Type *PtrRetTy = PointerType::getUnqual(OrigRetTy); + Type *PtrRetTy = OrigRetTy->getPointerTo(DL.getAllocaAddrSpace()); ComputeValueVTs(*this, DL, PtrRetTy, PVTs); assert(PVTs.size() == 1 && "Pointers should fit in one register"); |
