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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-12-12 10:29:43 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-12-12 10:29:43 +0000
commit040a36c17652cf043496272c226ecfbe735e954f (patch)
treebe34ad734adcc8a60b8dc333d1a1c4ab78f045f8 /llvm/lib/CodeGen/SelectionDAG
parent36ecce9bedb14b1c8e884bd0ec309103d7c3675c (diff)
downloadbcm5719-llvm-040a36c17652cf043496272c226ecfbe735e954f.tar.gz
bcm5719-llvm-040a36c17652cf043496272c226ecfbe735e954f.zip
[SelectionDAG] Add support for EXTRACT_SUBVECTOR to ComputeNumSignBits
Pre-commit as discussed on D27657 llvm-svn: 289425
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 45c9c59fe21..6608e32d43f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2977,6 +2977,8 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
return ComputeNumSignBits(Op.getOperand(0), Depth+1);
break;
}
+ case ISD::EXTRACT_SUBVECTOR:
+ return ComputeNumSignBits(Op.getOperand(0), Depth + 1);
case ISD::CONCAT_VECTORS:
// Determine the minimum number of sign bits across all input vectors.
// Early out if the result is already 1.
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